International Science Index
Evaluation of Model-Based Code Generation for Embedded Systems–Mature Approach for Development in Evolution
Model-based development approach is gaining more support and acceptance. Its higher abstraction level brings simplification of systems’ description that allows domain experts to do their best without particular knowledge in programming. The different levels of simulation support the rapid prototyping, verifying and validating the product even before it exists physically. Nowadays model-based approach is beneficial for modelling of complex embedded systems as well as a generation of code for many different hardware platforms. Moreover, it is possible to be applied in safety-relevant industries like automotive, which brings extra automation of the expensive device certification process and especially in the software qualification. Using it, some companies report about cost savings and quality improvements, but there are others claiming no major changes or even about cost increases. This publication demonstrates the level of maturity and autonomy of model-based approach for code generation. It is based on a real live automotive seat heater (ASH) module, developed using The Mathworks, Inc. tools. The model, created with Simulink, Stateflow and Matlab is used for automatic generation of C code with Embedded Coder. To prove the maturity of the process, Code generation advisor is used for automatic configuration. All additional configuration parameters are set to auto, when applicable, leaving the generation process to function autonomously. As a result of the investigation, the publication compares the quality of generated embedded code and a manually developed one. The measurements show that generally, the code generated by automatic approach is not worse than the manual one. A deeper analysis of the technical parameters enumerates the disadvantages, part of them identified as topics for our future work.
An Implementation of a Configurable UART-to-Ethernet Converter
This paper presents an implementation of a configurable UART-to-Ethernet converter using an ARM-based 32-bit microcontroller as well as a dedicated configuration program running on a PC for configuring the operating parameters of the converter. The program was written in Python. Various parameters pertaining to the operation of the converter can be modified by the configuration program through the Ethernet interface of the converter. The converter supports 3 representative asynchronous serial communication protocols, RS-232, RS-422, and RS-485 and supports 3 network modes, TCP/IP server, TCP/IP client, and UDP client. The TCP/IP and UDP protocols were implemented on the microcontroller using an open source TCP/IP protocol stack called lwIP (A lightweight TCP/IP) and FreeRTOS, a free real-time operating system for embedded systems. Due to the use of a real-time operating system, the firmware of the converter was implemented as a multi-thread application and as a result becomes more modular and easier to develop. The converter can provide a seamless bridge between a serial port and an Ethernet port, thereby allowing existing legacy apparatuses with no Ethernet connectivity to communicate using the Ethernet protocol.
A Study of Recent Contribution on Simulation Tools for Network-on-Chip
The growth in the number of Intellectual Properties (IPs) or the number of cores on the same chip becomes a critical issue in System-on-Chip (SoC) due to the intra-communication problem between the chip elements. As a result, Network-on-Chip (NoC) has emerged as a system architecture to overcome intra-communication issues. This paper presents a study of recent contributions on simulation tools for NoC. Furthermore, an overview of NoC is covered as well as a comparison between some NoC simulators to help facilitate research in on-chip communication.
Towards a Framework for Embedded Weight Comparison Algorithm with Business Intelligence in the Plantation Domain
Embedded systems have emerged as important elements in various domains with extensive applications in automotive, commercial, consumer, healthcare and transportation markets, as there is emphasis on intelligent devices. On the other hand, Business Intelligence (BI) has also been extensively used in a range of applications, especially in the agriculture domain which is the area of this research. The aim of this research is to create a framework for Embedded Weight Comparison Algorithm with Business Intelligence (EWCA-BI). The weight comparison algorithm will be embedded within the plantation management system and the weighbridge system. This algorithm will be used to estimate the weight at the site and will be compared with the actual weight at the plantation. The algorithm will be used to build the necessary alerts when there is a discrepancy in the weight, thus enabling better decision making. In the current practice, data are collected from various locations in various forms. It is a challenge to consolidate data to obtain timely and accurate information for effective decision making. Adding to this, the unstable network connection leads to difficulty in getting timely accurate information. To overcome the challenges embedding is done on a portable device that will have the embedded weight comparison algorithm to also assist in data capture and synchronize data at various locations overcoming the network short comings at collection points. The EWCA-BI will provide real-time information at any given point of time, thus enabling non-latent BI reports that will provide crucial information to enable efficient operational decision making. This research has a high potential in bringing embedded system into the agriculture industry. EWCA-BI will provide BI reports with accurate information with uncompromised data using an embedded system and provide alerts, therefore, enabling effective operation management decision-making at the site.
Parametrization of Piezoelectric Vibration Energy Harvesters for Low Power Embedded Systems
Matching an embedded electronic application with a
cantilever vibration energy harvester remains a difficult endeavour
due to the large number of factors influencing the output power.
In the presented work, complementary balanced energy harvester
parametrization is used as a methodology for simplification of
harvester integration in electronic applications. This is achieved
by a dual approach consisting of an adaptation of the general
parametrization methodology in conjunction with a straight forward
harvester benchmarking strategy. For this purpose, the design and
implementation of a suitable user friendly cantilever energy harvester
benchmarking platform is discussed. Its effectiveness is demonstrated
by applying the methodology to a commercially available Mide
V21BL vibration energy harvester, with excitation amplitude and
frequency as variables.
An Optimal Steganalysis Based Approach for Embedding Information in Image Cover Media with Security
This paper deals with the study of interest in the fields
of Steganography and Steganalysis. Steganography involves hiding
information in a cover media to obtain the stego media in such a
way that the cover media is perceived not to have any embedded
message for its unintended recipients. Steganalysis is the mechanism
of detecting the presence of hidden information in the stego media
and it can lead to the prevention of disastrous security incidents. In
this paper, we provide a critical review of the steganalysis algorithms
available to analyze the characteristics of an image stego media
against the corresponding cover media and understand the process
of embedding the information and its detection. We anticipate that
this paper can also give a clear picture of the current trends in
steganography so that we can develop and improvise appropriate
Robotics and Embedded Systems Applied to the Buried Pipeline Inspection
The work aims to develop a robot in the form of
autonomous vehicle to detect, inspection and mapping of
underground pipelines through the ATmega328 Arduino platform.
Hardware prototyping is very similar to C / C ++ language that
facilitates its use in robotics open source, resembles PLC used in
large industrial processes. The robot will traverse the surface
independently of direct human action, in order to automate the
process of detecting buried pipes, guided by electromagnetic
induction. The induction comes from coils that send the signal to the
Arduino microcontroller contained in that will make the difference in
intensity and the treatment of the information, and then this
determines actions to electrical components such as relays and
motors, allowing the prototype to move on the surface and getting the
necessary information. This change of direction is performed by a
stepper motor with a servo motor. The robot was developed by
electrical and electronic assemblies that allowed test your application.
The assembly is made up of metal detector coils, circuit boards and
microprocessor, which interconnected circuits previously developed
can determine, process control and mechanical actions for a robot
(autonomous car) that will make the detection and mapping of buried
pipelines plates. This type of prototype can prevent and identifies
possible landslides and they can prevent the buried pipelines suffer an
external pressure on the walls with the possibility of oil leakage and
thus pollute the environment.
How Virtualization, Decentralization and Network Building Change the Manufacturing Landscape: An Industry 4.0 Perspective
The German manufacturing industry has to withstand an increasing global competition on product quality and production costs. As labor costs are high, several industries have suffered severely under the relocation of production facilities towards aspiring countries, which have managed to close the productivity and quality gap substantially. Established manufacturing companies have recognized that customers are not willing to pay large price premiums for incremental quality improvements. As a consequence, many companies from the German manufacturing industry adjust their production focusing on customized products and fast time to market. Leveraging the advantages of novel production strategies such as Agile Manufacturing and Mass Customization, manufacturing companies transform into integrated networks, in which companies unite their core competencies. Hereby, virtualization of the process- and supply-chain ensures smooth inter-company operations providing real-time access to relevant product and production information for all participating entities. Boundaries of companies deteriorate, as autonomous systems exchange data, gained by embedded systems throughout the entire value chain. By including Cyber-Physical-Systems, advanced communication between machines is tantamount to their dialogue with humans. The increasing utilization of information and communication technology allows digital engineering of products and production processes alike. Modular simulation and modeling techniques allow decentralized units to flexibly alter products and thereby enable rapid product innovation. The present article describes the developments of Industry 4.0 within the literature and reviews the associated research streams. Hereby, we analyze eight scientific journals with regards to the following research fields: Individualized production, end-to-end engineering in a virtual process chain and production networks. We employ cluster analysis to assign sub-topics into the respective research field. To assess the practical implications, we conducted face-to-face interviews with managers from the industry as well as from the consulting business using a structured interview guideline. The results reveal reasons for the adaption and refusal of Industry 4.0 practices from a managerial point of view. Our findings contribute to the upcoming research stream of Industry 4.0 and support decision-makers to assess their need for transformation towards Industry 4.0 practices.
Evaluation of Features Extraction Algorithms for a Real-Time Isolated Word Recognition System
Paper presents an comparative evaluation of features extraction algorithm for a real-time isolated word recognition system
based on FPGA. The Mel-frequency cepstral, linear frequency cepstral, linear predictive and their cepstral coefficients were
implemented in hardware/software design. The proposed system was investigated in speaker dependent mode for 100 different
Lithuanian words. The robustness of features extraction algorithms was tested recognizing the speech records at different signal to noise rates. The experiments on clean records show highest accuracy for Mel-frequency cepstral and linear frequency cepstral coefficients. For records with 15 dB signal to noise rate the linear predictive cepstral coefficients gives best result. The hard and soft part of the system is clocked on 50 MHz and 100 MHz accordingly. For the classification purpose the pipelined dynamic time warping core was implemented. The proposed word recognition system satisfy the real-time requirements and is suitable for applications in embedded systems.
Development of 3D Laser Scanner for Robot Navigation
Autonomous robotic systems need an equipment like a human eye for their movement. In this study a 3D laser scanner has been designed and implemented for those autonomous robotic systems. In general 3D laser scanners are using 2 dimension laser range finders that are moving on one-axis (1D) to generate the model. In this study, the model has been obtained by a one-dimensional laser range finder that is moving in two –axis (2D) and because of this the laser scanner has been produced cheaper.
Development of a Computer Vision System for the Blind and Visually Impaired Person
Eyes are an essential and conspicuous organ of the human body. Human eyes are outward and inward portals of the body that allows to see the outside world and provides glimpses into ones inner thoughts and feelings. Inevitable blindness and visual impairments may results from eye-related disease, trauma, or congenital or degenerative conditions that cannot be corrected by conventional means. The study emphasizes innovative tools that will serve as an aid to the blind and visually impaired (VI) individuals. The researchers fabricated a prototype that utilizes the Microsoft Kinect for Windows and Arduino microcontroller board. The prototype facilitates advanced gesture recognition, voice recognition, obstacle detection and indoor environment navigation. Open Computer Vision (OpenCV) performs image analysis, and gesture tracking to transform Kinect data to the desired output. A computer vision technology device provides greater accessibility for those with vision impairments.
A General Mandatory Access Control Framework in Distributed Environments
In this paper, we propose a general mandatory access framework for distributed systems. The framework can be applied into multiple operating systems and can handle multiple stakeholders. Despite considerable advancements in the area of mandatory access control, a certain approach to enforcing mandatory access control can only be applied in a specific operating system. Other than PC market in which windows captures the overwhelming shares, there are a number of popular operating systems in the emerging smart phone environment, i.e. Android, Windows mobile, Symbian, RIM. It should be noted that more and more stakeholders are involved in smartphone software, such as devices owners, service providers and application providers. Our framework includes three parts—local decision layer, the middle layer and the remote decision layer. The middle layer takes charge of managing security contexts, OS API, operations and policy combination. The design of the remote decision layer doesn’t depend on certain operating systems because of the middle layer’s existence. We implement the framework in windows, linux and other popular embedded systems.
Embedded Systems Energy Consumption Analysis Through Co-modelling and Simulation
This paper presents a new methodology to study power and energy consumption in mechatronic systems early in the development process. This new approach makes use of two modeling languages to represent and simulate embedded control software and electromechanical subsystems in the discrete event and continuous time domain respectively within a single co-model. This co-model enables an accurate representation of power and energy consumption and facilitates the analysis and development of both software and electro-mechanical subsystems in parallel. This makes the engineers aware of energy-wise implications of different design alternatives and enables early trade-off analysis from the beginning of the analysis and design activities.
Smart Cane Assisted Mobility for the Visually Impaired
An efficient reintegration of the disabled people in the
family and society should be fulfilled; hence it is strongly needful to assist their diminished functions or to replace the totally lost
functions. Assistive technology helps in neutralizing the impairment.
Recent advancements in embedded systems have opened up a vast
area of research and development for affordable and portable assistive devices for the visually impaired. Granted there are many assistive devices on the market that are able to detect obstacles, and numerous research and development currently in process to
alleviate the cause, unfortunately the cost of devices, size of
devices, intrusiveness and higher learning curve prevents the visually impaired from taking advantage of available devices. This
project aims at the design and implementation of a detachable unit
which is robust, low cost and user friendly, thus, trying to
aggrandize the functionality of the existing white cane, to concede above-knee obstacle detection. The designed obstruction detector
uses ultrasound sensors for detecting the obstructions before direct contact. It bestows haptic feedback to the user in accordance with the position of the obstacle.
A Novel Implementation of Application Specific Instruction-set Processor (ASIP) using Verilog
The general purpose processors that are used in
embedded systems must support constraints like execution time,
power consumption, code size and so on. On the other hand an
Application Specific Instruction-set Processor (ASIP) has advantages
in terms of power consumption, performance and flexibility. In this
paper, a 16-bit Application Specific Instruction-set processor for the
sensor data transfer is proposed. The designed processor architecture
consists of on-chip transmitter and receiver modules along with the
processing and controlling units to enable the data transmission and
reception on a single die. The data transfer is accomplished with less
number of instructions as compared with the general purpose
processor. The ASIP core operates at a maximum clock frequency of
1.132GHz with a delay of 0.883ns and consumes 569.63mW power
at an operating voltage of 1.2V. The ASIP is implemented in Verilog
HDL using the Xilinx platform on Virtex4.
System-Level Energy Estimation for SoC based on the Dynamic Behavior of Embedded Software
This paper describes a system-level SoC energy
consumption estimation method based on a dynamic behavior of
embedded software in the early stages of the SoC development. A
major problem of SOC development is development rework caused by
unreliable energy consumption estimation at the early stages. The
energy consumption of an SoC used in embedded systems is strongly
affected by the dynamic behavior of the software. At the early stages
of SoC development, modeling with a high level of abstraction is
required for both the dynamic behavior of the software, and the
behavior of the SoC. We estimate the energy consumption by a UML
model-based simulation. The proposed method is applied for an actual
embedded system in an MFP. The energy consumption estimation of
the SoC is more accurate than conventional methods and this proposed
method is promising to reduce the chance of development rework in
the SoC development. ∈
Immunity of Integrated Drive System, Effects of Radiated and Conducted Emission
In this paper the problems associated with immunity
of embedded systems used in Motor-Drive systems are investigated
and appropriate solutions are presented. Integration of VSD motor
systems (Integral Motor) while partially reducing some of these
effects, adds to immunity problem of their embedded systems. Fail
safe operation of an Integral Motor in arduous industrial
environments is considered. In this paper an integral motor with a
unique design is proposed to overcome critical issues such as heat,
vibration and electromagnetic interference which are damaging to
sensitive electronics without requirement of any additional cooling
system. Advantages of the proposed Integral motor are compactness
of combo motor and drive system with no external cabling/wiring.
This motor provides a perfect shielding for least amount of radiated
emission. It has an inbuilt filter for EMC compliance and has been
designed to provide lower EMC noise for immunity of the internal
electronics as well as the other neighbouring systems.
A Microcontroller Implementation of Model Predictive Control
Model Predictive Control (MPC) is increasingly being
proposed for real time applications and embedded systems. However
comparing to PID controller, the implementation of the MPC in
miniaturized devices like Field Programmable Gate Arrays (FPGA)
and microcontrollers has historically been very small scale due to its
complexity in implementation and its computation time requirement.
At the same time, such embedded technologies have become an
enabler for future manufacturing enterprises as well as a transformer
of organizations and markets. Recently, advances in microelectronics
and software allow such technique to be implemented in embedded
systems. In this work, we take advantage of these recent advances
in this area in the deployment of one of the most studied and
applied control technique in the industrial engineering. In fact in
this paper, we propose an efficient framework for implementation
of Generalized Predictive Control (GPC) in the performed STM32
microcontroller. The STM32 keil starter kit based on a JTAG interface
and the STM32 board was used to implement the proposed GPC
firmware. Besides the GPC, the PID anti windup algorithm was
also implemented using Keil development tools designed for ARM
processor-based microcontroller devices and working with C/Cµ
langage. A performances comparison study was done between both
firmwares. This performances study show good execution speed and
low computational burden. These results encourage to develop simple
predictive algorithms to be programmed in industrial standard hardware.
The main features of the proposed framework are illustrated
through two examples and compared with the anti windup PID
Implementation of a Reed-Solomon Code as an ECC in Yet Another Flash File System
Flash memory has become an important storage device
in many embedded systems because of its high performance, low
power consumption and shock resistance. Multi-level cell (MLC) is
developed as an effective solution for reducing the cost and increasing
the storage density in recent years. However, most of flash file system
cannot handle the error correction sufficiently. To correct more errors
for MLC, we implement Reed-Solomon (RS) code to YAFFS, what is
widely used for flash-based file system. RS code has longer computing
time but the correcting ability is much higher than that of Hamming
Application of Formal Methods for Designing a Separation Kernel for Embedded Systems
A separation-kernel-based operating system (OS) has been designed for use in secure embedded systems by applying formal methods to the design of the separation-kernel part. The separation kernel is a small OS kernel that provides an abstract distributed environment on a single CPU. The design of the separation kernel was verified using two formal methods, the B method and the Spin model checker. A newly designed semi-formal method, the extended state transition method, was also applied. An OS comprising the separation-kernel part and additional OS services on top of the separation kernel was prototyped on the Intel IA-32 architecture. Developing and testing of a prototype embedded application, a point-of-sale application, on the prototype OS demonstrated that the proposed architecture and the use of formal methods to design its kernel part are effective for achieving a secure embedded system having a high-assurance separation kernel.
A Simulator for Robot Navigation Algorithms
A robot simulator was developed to measure and
investigate the performance of a robot navigation system based on
the relative position of the robot with respect to random obstacles in
any two dimensional environment. The presented simulator focuses
on investigating the ability of a fuzzy-neural system for object
avoidance. A navigation algorithm is proposed and used to allow
random navigation of a robot among obstacles when the robot faces
an obstacle in the environment. The main features of this simulator
can be used for evaluating the performance of any system that can
provide the position of the robot with respect to obstacles in the
environment. This allows a robot developer to investigate and
analyze the performance of a robot without implementing the
A Tabu Search Heuristic for Scratch-Pad Memory Management
Reducing energy consumption of embedded systems requires careful memory management. It has been shown that Scratch- Pad Memories (SPMs) are low size, low cost, efficient (i.e. energy saving) data structures directly managed at the software level. In this paper, the focus is on heuristic methods for SPMs management. A method is efficient if the number of accesses to SPM is as large as possible and if all available space (i.e. bits) is used. A Tabu Search (TS) approach for memory management is proposed which is, to the best of our knowledge, a new original alternative to the best known existing heuristic (BEH). In fact, experimentations performed on benchmarks show that the Tabu Search method is as efficient as BEH (in terms of energy consumption) but BEH requires a sorting which can be computationally expensive for a large amount of data. TS is easy to implement and since no sorting is necessary, unlike BEH, the corresponding sorting time is saved. In addition to that, in a dynamic perspective where the maximum capacity of the SPM is not known in advance, the TS heuristic will perform better than BEH.
On-line Testing of Software Components for Diagnosis of Embedded Systems
This paper studies the dependability of componentbased
applications, especially embedded ones, from the diagnosis
point of view. The principle of the diagnosis technique is to
implement inter-component tests in order to detect and locate the
faulty components without redundancy. The proposed approach for
diagnosing faulty components consists of two main aspects. The first
one concerns the execution of the inter-component tests which
requires integrating test functionality within a component. This is the
subject of this paper. The second one is the diagnosis process itself
which consists of the analysis of inter-component test results to
determine the fault-state of the whole system. Advantage of this
diagnosis method when compared to classical redundancy faulttolerant
techniques are application autonomy, cost-effectiveness and
better usage of system resources. Such advantage is very important
for many systems and especially for embedded ones.
A Model Driven Based Method for Scheduling Analysis and HW/SW Partitioning
Unified Modeling Language (UML) extensions for real time embedded systems (RTES) co-design, are taking a growing interest by a great number of industrial and research communities. The extension mechanism is provided by UML profiles for RTES. It aims at improving an easily-understood method of system design for non-experts. On the other hand, one of the key items of the co- design methods is the Hardware/Software partitioning and scheduling tasks. Indeed, it is mandatory to define where and when tasks are implemented and run. Unfortunately the main goals of co-design are not included in the usual practice of UML profiles. So, there exists a need for mapping used models to an execution platform for both schedulability test and HW/SW partitioning. In the present work, test schedulability and design space exploration are performed at an early stage. The proposed approach adopts Model Driven Engineering MDE. It starts from UML specification annotated with the recent profile for the Modeling and Analysis of Real Time Embedded systems MARTE. Following refinement strategy, transformation rules allow to find a feasible schedule that satisfies timing constraints and to define where tasks will be implemented. The overall approach is experimented for the design of a football player robot application.
Stepwise Refinement in Executable-UML for Embedded System Design: A Preliminary Study
The fast growth in complexity coupled with requests for shorter development periods for embedded systems are bringing demands towards a more effective, i.e. higher-abstract, design process for hardaware/software integrated design. In Software Engineering area, Model Driven Architecture (MDA) and Executable UML (xUML) has been accepted to bring further improvement in software design. This paper constructs MDA and xUML stepwise transformations from an abstract specification model to a more concrete implementation model using the refactoring technique for hardaware/software integrated design. This approach provides clear and structured models which enables quick exploration and synthesis, and early stage verification.
Efficient Large Numbers Karatsuba-Ofman Multiplier Designs for Embedded Systems
Long number multiplications (n ≥ 128-bit) are a
primitive in most cryptosystems. They can be performed better by
using Karatsuba-Ofman technique. This algorithm is easy to
parallelize on workstation network and on distributed memory, and
it-s known as the practical method of choice. Multiplying long
numbers using Karatsuba-Ofman algorithm is fast but is highly
recursive. In this paper, we propose different designs of
implementing Karatsuba-Ofman multiplier. A mixture of sequential
and combinational system design techniques involving pipelining is
applied to our proposed designs. Multiplying large numbers can be
adapted flexibly to time, area and power criteria. Computationally
and occupation constrained in embedded systems such as: smart
cards, mobile phones..., multiplication of finite field elements can be
achieved more efficiently. The proposed designs are compared to
other existing techniques. Mathematical models (Area (n), Delay (n))
of our proposed designs are also elaborated and evaluated on
different FPGAs devices.
64 bit Computer Architectures for Space Applications – A study
The more recent satellite projects/programs makes
extensive usage of real – time embedded systems. 16 bit processors
which meet the Mil-Std-1750 standard architecture have been used in
on-board systems. Most of the Space Applications have been written
in ADA. From a futuristic point of view, 32 bit/ 64 bit processors are
needed in the area of spacecraft computing and therefore an effort is
desirable in the study and survey of 64 bit architectures for space
applications. This will also result in significant technology
development in terms of VLSI and software tools for ADA (as the
legacy code is in ADA).
There are several basic requirements for a special processor for
this purpose. They include Radiation Hardened (RadHard) devices,
very low power dissipation, compatibility with existing operational
systems, scalable architectures for higher computational needs,
reliability, higher memory and I/O bandwidth, predictability, realtime
operating system and manufacturability of such processors.
Further on, these may include selection of FPGA devices, selection
of EDA tool chains, design flow, partitioning of the design, pin
count, performance evaluation, timing analysis etc.
This project deals with a brief study of 32 and 64 bit processors
readily available in the market and designing/ fabricating a 64 bit
RISC processor named RISC MicroProcessor with added
functionalities of an extended double precision floating point unit
and a 32 bit signal processing unit acting as co-processors. In this
paper, we emphasize the ease and importance of using Open Core
(OpenSparc T1 Verilog RTL) and Open “Source" EDA tools such as
Icarus to develop FPGA based prototypes quickly. Commercial tools
such as Xilinx ISE for Synthesis are also used when appropriate.
A Modified Spiral Search Algorithm and Its Embedded System Architecture Design
One of the most growing areas in the embedded community is multimedia devices. Multimedia devices incorporate a number of complicated functions for their operation, like motion estimation. A multitude of different implementations have been proposed to reduce motion estimation complexity, such as spiral search. We have studied the implementations of spiral search and identified areas of improvement. We propose a modified spiral search algorithm, with lower computational complexity compared to the original spiral search. We have implemented our algorithm on an embedded ARM based architecture, with custom memory hierarchy. The resulting system yields energy consumption reduction up to 64% and performance increase up to 77%, with a small penalty of 2.3 dB, in average, of video quality compared with the original spiral search algorithm.
Web Based Remote Access Microcontroller Laboratory
This paper presents a web based remote access
microcontroller laboratory. Because of accelerated development in
electronics and computer technologies, microcontroller-based devices
and appliances are found in all aspects of our daily life. Before the
implementation of remote access microcontroller laboratory an
experiment set is developed by teaching staff for training
microcontrollers. Requirement of technical teaching and industrial
applications are considered when experiment set is designed.
Students can make the experiments by connecting to the experiment
set which is connected to the computer that set as the web server. The
students can program the microcontroller, can control digital and
analog inputs and can observe experiment. Laboratory experiment
web page can be accessed via www.elab.aku.edu.tr address.
Multi-view Description of Real-Time Systems- Architecture
Real-time embedded systems should benefit from
component-based software engineering to handle complexity and
deal with dependability. In these systems, applications should not
only be logically correct but also behave within time windows.
However, in the current component based software engineering
approaches, a few of component models handles time properties in
a manner that allows efficient analysis and checking at the
architectural level. In this paper, we present a meta-model for
component-based software description that integrates timing
issues. To achieve a complete functional model of software
components, our meta-model focuses on four functional aspects:
interface, static behavior, dynamic behavior, and interaction
protocol. With each aspect we have explicitly associated a time
model. Such a time model can be used to check a component-s
design against certain properties and to compute the timing
properties of component assemblies.